Pacer user memory card schematic reverse-engineered, and status of the card

I finished tracing the Pacer user memory card schematic. Most of it seems fairly obvious, except bus pin 25 and the E1/E2/E3 jumper. There are also some functional problems with this particular card.The memory card was normally supplied with 256 16-bit words of static RAM (512 bytes) composed of four 2112 256×4 SRAM chips.  It is possible to add up to three more sets of four SRAM chips to expand the user memory to 1K word (2K bytes).  There are also two pairs of sockets for MM5204 512×8 EPROMs, which may be used for up to 1K word (2K bytes) of nonvolatile memory.  I refer to it as a “user memory card” to make it clear that the monitor ROM and scratchpad RAM are elsewhere in the system (on the control panel interface card).

This particular card presently has two problems:

  1. All RAM locations read back with the four most significant bits as all-ones, regardless of what is written.
  2. The RAM is supposed to be fully decoded, but I find it mirrored at 0000-03ff and 2000-23ff.

I think both problems could be due to a bad DS8833 bidirectional bus buffer chip at UD4. This buffer is responsible for the four most significant bits of both addresses and data. I speculate that it is not driving the backplane bus at all, and when receiving an address or data from the backplane bus, the received bit 13 is stuck low.

After I finish my attempt to read the masked ROM on the control panel interface card using a logic analyzer, I will reinstall the user memory card, hook up the logic analyzer to the UD4 bus buffer, and test my theory. All of the chips except the RAMs (and EPROMs if there were any) are soldered in, and I don’t want to desolder the bus buffer until I’m sure it is faulty.

The DS8833 is not an easy to find part these days, but fortunately I did find some on eBay. Of course, I’m not certain that they are good.

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