Reverse-engineering the Apple II emulation disk for the Apple ///

I’ve been curious about some details of how the Apple II emulation disk for the Apple III works, so I’ve been working on reverse-engineering the code. I’ve just put it up on github.

The first 1 1/2 tracks of the disk get loaded into memory from A000..B7FF. That loads the Apple II ROM images into memory from 2000 up. Then it gives the user a chance to change some configuration options. Finally it copies the ROM images into place, does some more hardware configuration, sets the hardware Apple II emulation mode, and jumps into the Apple II monitor ROM.

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Changing interleave of Apple II (and Apple ///) floppy disk images

On Twitter, Mike Finger (@Retro2Neo) mentioned that he used a Python script dsk2po by @paulhagstrom to convert the sector order of Apple II floppy disk images. I just needed to do that this week for Apple III images, and not having been aware of dsk2po, a few days ago I wrote a to do the same thing. Currently it can convert between physical order, DOS order (which is what most .dsk images are), and ProDOS/Pascal/SOS order.

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Using BMOW Floppy Emu on Apple ///

Because of the lack of working Apple III floppy drives, I made a cable to connect a BMOW Floppy Emu to the Apple III internal floppy connector. The Apple III uses a 26-pin cable to the floppy drives, while the Apple II uses a 20-pin cable. Pins 1-20 are wired identically; the extra pins on the Apple III are used for additional signals for daisy-chaining extra drives (up to three total) and supporting Apple II emulation mode. I took a 26-pin cable, split off six wires at one end, and installed a 20-pin header.

BMOW Floppy Emu in use on Apple ///

After copying some Apple III floppy images to the MicroSD card, I was pleased to find that it works just fine. I’ve been able to boot SOS 1.3 with Business BASIC 1.23, and Pascal 1.1.

Apple /// running Business BASIC 1.23

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No working internal floppy drive for Apple ///; spare motherboard

In addition to the internal floppy drive that came in my Apple III, and which does not work, I have three additional spare internal floppy drive mechanisms. Today I tried all of them, and found that none of them work well enough to boot an Apple III disk written from a disk image file by my Apple IIe. The disk format is identical to Apple Disk II 16-sector 5.25-inch format, and the Unidisk 5.25 drives I’m using on the Apple IIe haven’t had any trouble reading and writing any other disks from a large collection from various sources, so I’m pretty sure the drive on the Apple IIe is not the problem.

Having four non-working drives made me think that perhaps the floppy controller, an integrated part of the Apple III motherboard, might be bad. I switched to my spare motherboard, and didn’t have any different results.

I also have an external Disk III drive. I tried cabling that to the internal drive port, in place of the internal drive, and was able to successfully boot the Apple III Dealer Diagnostics disk. That mostly worked, and I was able to test the RAM and ROM of both motherboards. Both are the later 5V configuration, one with a 5V 256KB memory board, and one with a 5V 128KB memory board (which could easily be expanded to 256KB).

I say “mostly worked” because the drive did give I/O errors trying to load some of the diagnostics, or to display a CATALOG of the diagnostic disk. So really, I have five Apple /// floppy drives that aren’t working properly.

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Floppy drive spindle motor speed measurement

The floppy drive in my Apple III is not working well enough to boot floppies written on my Apple II. I think the spindle motor speed may be off. I’m hoping that’s what it is, since it’s the easiest thing to fix. I’m putting together a timing strobe light to measure it, using a microcontroller and an inexpensive Harbor Freight LED flashlight.

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Apple /// floppy drive discovery

I was looking at the schematics of Apple II and Apple III floppy disk drive analog boards on Bitsavers late last night, and made a surprising discovery: the DuoDisk 5.25 dual floppy drive sold for use on the Apple II is actually directly usable on the Apple III+, with the full functionality the Apple III SOS operating system expects.

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RC2018/04 entry

For the next RetroChallenge, I plan to port the Infocom ZIP intepreter to the Apple III, to run games (including Zork) natively under the SOS operating system.

At the moment the floppy drive of my Apple III isn’t working properly, so I’ll have to fix that or replace it with one of my spares, though the spares aren’t necessarily in working order either. This evening I purchased a two-pack of inexpensive LED flashlights from Harbor Freight, and I plan to modify one, adding a PIC or AVR microcontroller, crystal, and NFET, to make a timing light for adjustment of motor speed. I hope that just adjusting the motor speed will be sufficient to get at least one of my floppy drives working; I don’t presently have a head alignment diskette.

In 1983, I mostly reverse-engineered the version 1, 2, and 3 (no revision letter) of the Infocom ZIP interpreters into source code that could be assembled using Microsoft ALDS on CP/M. Until recently, all that survived of that effort was a printed listing, which my friend Richard had preserved, and returned to me in 2002. I put a scanned PDF of the listing online, and . The listing has false conditionals disabled, so only the code for the version 3 interpreter is seen, with a two-instruction modification I made to display lower case. (Infocom’s 3A interpreter supported 80 column display with lower case on the Apple IIe.)

In the last few weeks, I retyped the source code, converted it to assemble with a modern cross-assembler, added back the conditionals for ZIP versions 1 and 2, and added the code for 3A and 3B. I’ve put it on Github. This source code will be used as the basis for the SOS port of the interpreter.

The display output and keyboard input code will have to be replaced with code that uses the .CONSOLE driver, and the disk I/O code, both for “story file” and save file access will have to be replaced with code that uses the SOS file system calls, which are similar to the ProDOS file system calls used on the Apple II.

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Added serial port

I’ve added the DE-9S connector, TRS202ECN transceiver (equivalent to MAX202), and ceramic capacitors, which make up the TIA-232-F serial interface. The serial interface uses a female connector and is wired as DCE (Data Communication Equiment) to facilitate direct connection to a USB-to-serial adapter.


Not shown: two trace cuts and two orange jumper wires on bottom of main PCB.

Next I’ll need to get a VHDL UART working with my 1802 core.

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RetroChallenge RC2017/10 final report

My RetroChallenge RC2017/10 project was to update and improve my FPGA-Elf. The resulting hardware may be seen here:


I have succeeded in accomplishing my main goals for the project, which were:

  1. Update my FPGA-Elf design to use a currently-available, relatively inexpensive FPGA board/module
  2. Design a base PCB for the FPGA-Elf, using only through-hole components, and have it fabricated
  3. Implement CDP1861 PIXIE graphics

I originally wanted the new hardware design to use only currently-manufactured components, which would rule out both the HP 5082-7340 hexadecimal LED displays used by the original Elf and the TI TIL311 hexadecimal LED displays often used in more recent Elf builds.  As an alternative I chose the Liteon LTP-305HR, which is a 5×7 dot matrix LED display, a drop-in replacement for the Monsanto or GI MAN2A or the TI TIL305.

I spent the first week of the RetroChallenge building a breadboard prototype of a six-character display using the LTP-305HR, with serial low-side and high-side drivers, and a MicroBlaze soft-core CPU in the FPGA controlling them. While I got the displays working, there were issues with the drive circuitry resulting in off pixels glowing, though less brightly than on pixels. I also did not like the appearance of the displays as much as the original hexadecimal LED display, so I abandoned the use of 5×7 dot matrix LED displays and proceeded to design my new board to accept either HP 5082-7340 or TI TIL311 displays.

I completed the PCB board designs by October 17th and placed the order for the boards. Due to the rush to get this done, there are a few minor errors in the board design that require some trace cuts and jumps.

While waiting for boards to arrive, I built a second breadboard prototype using the hexadecimal displays, and used it to design my CDP1861-compatible graphic display core. As with my earlier CDP1802-compatible CPU core, it is designed in synthesizable VHDL. There are no vendor-specific constructs except in the top-level Elf design which instantiates a Xilinx PLL clock multiplier.

The printed circuit boards arrived on October 23rd, and I assembled one on the 24th. After fixing one design error and removing one solder bridge, the FPGA-Elf was able to run my dice program.

By October 27th I had the PIXIE graphics fully working, running the PIXIE demo as shown in the July 1977 Popular Electronics article. I also ran my clock program. The FPGA-Elf is currently configured to run at 256 times the speed of an original Elf, so the clock runs at 256x real time. However, the clock display output is somewhat garbled, suggesting that my 1802 core has a previously undetected error.

Almost all of the project was done while I was out of town on a business trip. I returned home on October 28th, and badgered Richard Ottosen into cutting and drilling wood mounting rails for the FPGA-Elf, as seen in the photo. I have not yet done any further work on the hardware, FPGA code, or software.

I have quite a few Post-RetroChallenge tasks:

  1. Fix issue resulting in garbled clock display. (This issue will affect other programs also.)
  2. Publish design documents and source code:
    1. FGPA code for top-level design and CDP1861 graphics core (base Elf design and CDP1802 CPU core are already on github)
    2. Eagle CAD files for schematics and PCB designs
    3. PDF schematics
    4. PCB Gerber and Excellon files
  3. Add MicroSD and TIA-232-F serial port components to the board and test them. The serial port will require two more cuts and jumps, because I forgot to deal with the FPGA not being 5V-tolerant. Note that the MicroSD and serial port were not part of my project objectives; I included them in the PCB layout for future use.
  4. Write a manual, including BOM and assembly instructions (including rework needed for rev 0 main board)
  5. Update main PCB design to correct errors, and order rev 1 main board
  6. Update FPGA code for rev 1 main board
  7. Build and test rev 1 main board
  8. Add UART to FPGA
  9. Write 1802 code to support SD card

I have six extra sets of bare PCBs of the current design which are available for sale. I do not offer kits or assembled units.

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Mounting rails for Elf

Richard Ottosen cut and drilled some mounting rails for me, out of some scrap wood. They’re standard Elf size, 3/8 inch wide by 3/4 inch tall by 6 inches deep, each with four 1/16 inch pilot holes for #4 wood screws.


I’d vaguely considered the idea of nice stained hardwood rails, but that doesn’t really seem in fitting with the general COSMAC Elf idea.

I haven’t actually mounted the boards on the rails yet, because I still need to cut and jump a few PCB traces.

Once I put these babies on my Elf, she’ll corner like she’s on rails!

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