Category Archives: FPGA

FPGA-Elf progress

I’ve assembled more of the front panel, but still can’t get photos uploaded to flickr.  I’ve ordered connectors and ribbon cable from Digikey, and paid for overnight shipping so they should be here on Tuesday. I’ve written a model of … Continue reading

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Implemented CDP1802 “load mode” in VHDL model

My 1802 model was missing some state transitions necessary for load mode to work properly.  Load mode occurs when CLEAR and WAIT are asserted simultaneously.  In this mode, DMA operations can occur, but no instructions can execute and no interrupts … Continue reading

Posted in FPGA, RetroChallenge | 1 Comment

VHDL switch debouncer for FPGA-Elf

I think I’ve already written VHDL code to debounce switches, but I can’t find it at the moment, so I’ve just written new debouncing code for the FPGA-Elf.  The system clock is divided down to produce a debounce clock of … Continue reading

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FPGA-Elf front panel parts arrived from Mouser

My order from Mouser Electronics, fifteen toggle switches, two pushbutton switches, and two hexadecimal LED displays, arrived today.  UPS ground shipping from Mansfield, Texas to Denver, Colorado took two days. The Elf only needs eleven toggle switches and one pushbutton … Continue reading

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Installed Xilinx ISE WebPack 12.1 on Fedora 12 x86_64

I’ve moved most of my development activities onto my new notebook, running Fedora 12 x86_64 Linux.  Today I installed Xilinx ISE WebPack 12.1 on it.  ISE is officially supported on Red Hat Enterprise Linux, but not on Fedora.  Fedora is … Continue reading

Posted in FPGA, RetroChallenge | 5 Comments

RetroChallenge 2010 project

After watching on the sidelines for the last few, I’ve decided to enter RetroChallenge 2010.  Since I enjoy hacking on FPGAs, I think I’ll transform an FPGA eval board into a COSMAC Elf.  I developed a partial VHDL implementation of … Continue reading

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Oooh! A snowclone posted to my blog!

To my rant on the CBS evolution survey, Tsar Chasm posted a response that is a snowclone, of the form: X make(s) baby Y cry. All your snowclone are belong to us! I, for one, welcome our new snowclone overlords.

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Setting up a Xilinx FPGA development system

I’ve been trying to use the latest Xilinx FPGA development software (Foundation ISE 7.1i) under Linux. It’s been a huge hassle getting it set up, but it’s finally working. Unfortunately Xilinx only officially supports Red Hat Enterprise Linux 3, which … Continue reading

Posted in Fedora, FPGA | 9 Comments