The original COSMAC Elf ran at 1 to 2 MHz. Every machine cycle required eight oscillator cycles, and each instruction required two or three machine cycles, so each instruction took 8 to 12 microseconds at 2 MHz, or 16 to 24 microseconds at 1 MHz.
The FPGA-Elf runs at 25 MHz when using a Spartan-3E FPGA in the slow speed grade, but it also needs only one oscillator cycle per machine cycle. That means that each instruction takes 80 to 120 nanoseconds. That’s 100 times the speed of a 2 MHz COSMAC Elf!
With the fastest (-4) speed grade of the newer Spartan 6 FPGA, the FPGA-Elf could run at 50 MHz, and with the fastest speed grade of the Virtex 6 FPGA, it could run at 100 MHz.
My 1802 core design hasn’t been heavily optimized for speed, so there might be some room for speed improvements even on the same FPGA. However, since I don’t really need it to run any faster, I’m not likely to spend time on such optimizations.