Due to unforeseen circumstances, I have a shift in focus for the RetroChallenge project. While I may yet do some vector graphics work as previously intended, for the first half of the RetroChallenge I’ve been busy writing VHDL code to implement an IEEE-488 interface (a.k.a. GPIB or HP-IB) in an FPGA, which I eventually intend to use to build modern peripherals for use with the HP 9830A, HP 87XM, HP 9000 Series 300, Commodore PET, CBM 8032, and SuperPET computers. I’ve already tweeted a little about the development of the GPIB core, but since it wasn’t originally intended to be my RetroChallenge project, I didn’t use the #retrochallenge hash tag for those tweets.
I’ve just put the work-in-progress VHDL code, including synthesizable RTL as well as testbench and stimulus files, in a github repository. The code is all licensed under the terms of the Free Software Foundation General Public License (GPL) version 3. I’m willing to negotiate non-GPL licenses on a case-by-case basis, though it seems unlikely that there’s a commercial market for it at this late date. Continue reading
For RC2016/01, I’m going to hook up an old vector display (the retro part) to a modern microcontroller and either write a new game for it or port an old one. Gee, that sounds kinda familiar. Didn’t someone try to do that for RC2015/07, and have only partial success? I suppose I may as well beat my head against the wall for a while again in January.
I’ll attempt to get Dave Kruglinski’s 8080 Spacewar running, as published (with source code) in his article “How to Implement Space War” in the October 1977 issue of _Byte_ magazine. As part of RC2015/07 I got the source code to cross assemble, but I haven’t actually run it, either on real hardware or in simulation.
I’ve added support for formatting double-sided eight-inch floppy disks to the Quay 900 floppy formatter program I wrote as part of my RetroChallenge 2014/07 project. The source code is still provided under the GPL v3.0 license.
I still haven’t worked out how to use interrupts and DMA, so the code is still polled.
I tried to have it sense whether the media is single-sided or double-sided, which is possible with 8-inch floppies because the index position is different, and double-sided drives usually report detecting a double-sided disk by driving the TWOSIDED/ line of the interface (pin 10 on Shugart-compatible drives) active. The NEC uPD765, Intel 8272, and equivalent FDCs sense that signal during seek commands and provide it in status word 3. However, I’m finding that the bit reads as zero regardless of whether I use a single-sided or double-sided medium. Some drives try to disallow access to the second side of a single-sided medium, but the particular CDC 9406 drives in this Quay 900 do not.
I stuck a logic probe on the TWOSIDED/ signal, and found that with these particular drives it is always either inactive, or toggling at a little under 1 kHz. I have no idea what that’s all about, but it clearly means that autodetection of media sidedness is not going to work.
Update: the toggling has nothing to do with the drive, but is caused by the uPD765/8272 feature of automatically scanning four disk drives to monitor their status. I’ll have to trace out the signal on the Quay board to figure out why it apparently isn’t getting to the FDC correctly.
I assembled and debugged one channel of my vector generator, and wrote some of the firmware to drive it. I have unfortunately NOT finished building the second channel, though I got <fingers separation=”10mm”>this</fingers> close.
Would you believe <fingers separation=”20mm”>this</fingers> close?
I’m going to try to blame my not having made more progress on the local electronics store being closed today, so I wasn’t able to get a 74HC04 I need (or any other 74HC inverting gate). However, that’s a flimsy excuse since I should have anticipated the need for it, and I haven’t completely finished wiring the second channel.
I’m going to consider it a qualified success anyhow. Analog electronics isn’t really my forte, but I was able to analyze the operation of the original Ciarcia vector generator (“Make Your Next Peripheral a Real Eye Opener”, BYTE, November 1976, based on Hal Chamberlin’s earlier design published in the first three issues of The Computer Hobbyist, 1974-1975) to the point where I understand how it works, and was able to update the design in simple ways for construction with more modern ICs. I did get one channel (half of a minimum vector generator) built and debugged, and test firmware written.
I also got Dave Kruglinski’s 8080 Space War game from the October 1977 BYTE to assemble with a cross-assembler. As originally written, it used a point-plot display, rather than vector. I intended to modify it to talk to the vector generator but have not yet done that.
- Firmware source code (github repository)
- Dave Kruglinski’s Space War source code (github repository)
I’d like to thank Richard Ottosen, Scot Anderson, and John Doran for advice and support on this project.
I added a 10 microsecond delay after loading the DAC, and adjusted R108. Now the ramps endpoints are full scale, and the positive and negative ramps are reasonably symmetric.
After correcting a few wiring errors, the single-channel vector generator works, though it needs some calibration. I have the vector generator on my test bench with the Silicon Labs EFM32WG starter kit (ARM Cortex-M4F microcontroller) running the firmware, and a mixed-signal oscilloscope on the floor showing waveforms. I’ve taken photos of the oscilloscope showing full scale (±0.5V) vectors, rising and falling. The rising ramp starts around -0.5V as expected, but doesn’t make it quite all the way to +0.5V, so I need to either tweak the R108 pot (ramp rate) or adjust the pulse width controlling analog switch T2. The falling ramp only starts from about +0.3V, and I’m not sure why. When I check everything statically the full DAC swing does drive the output to ±0.5V.
Now it’s time to wire up the Y axis, and maybe Z (intensity). Z isn’t necessary for basic functionality, but would be nice to have. I may skip it for now. Once I have Y going, I can put the scope in X-Y mode and see real vectors.
It’s also time to start thinking about laying out a PCB. The breadboard prototype was laid out for ease of assembly and debug, not for signal integrity, so a lot of noise is getting into it.
Bench power supply reports 3.3V@3mA, +12V@18mA, -12V@53mA. Found and fixed a wiring error. With DAC output near 0V, output of first opamp, unipolar to bipolar shifter, is -1.0V, as intended.
Next step: hook up SPI to microcontroller. I’ll be using an Energy Micro Wonder Gecko (ARM Cortex-M4F) starter kit. I need to write some test firmware to manually adjust the SPI DAC output, using the capacitive sensing slider of the starter kit, and to pulse the analog switch enables using the buttons of the starter kit. The pulse width of the second analog switch needs to be precisely timed, so I’ll use a hardware timer.
I’ve wired one of the vector generator channels on a breadboard, and took two photos. It’s ready for testing, but at the moment I can’t find enough test leads to wire up the breadboard to my three-output bench power supply (HP E3631A), so I’ll have to kludge something up tomorrow. Continue reading
Since my HP 1350A and 1351A vector generators are not working, and I don’t have time to fix them for RetroChallenge, I’m building a simple vector generator from scratch. The design is a slightly updated version of Steve Ciarcia’s design in “Make Your Next Peripheral a Real Eye Opener” from the November 1976 issue of BYTE magazine, which was a simplified version of Hal Chamberlin’s design from the first three issues of The Computer Hobbyist in 1974-1975. Continue reading
I hooked up two analog signal generators to the XY inputs of the HP 1338A Tri-Color XY display to display a Lissajou curve as a test of the inputs, and posted a video. Continue reading